BSI PD ISO/IEC TR 11801-9902:2017
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Information technology. Generic cabling for customer premises – End-to-end link configurations
Published By | Publication Date | Number of Pages |
BSI | 2017 | 30 |
This part of ISO/IEC 11801, which is a Technical Report, provides definitions for, and examples of, cabling implementations described as end-to-end (E2E) links.
In addition, this document provides performance specifications to support Class D and Class E balanced cabling channels of ISO/IEC 11801‑1. These specifications amend those channel specifications of ISO/IEC 11801‑1 by including the impact of the free connectors in accordance with the interfaces specified in ISO/IEC 11801‑3 used to terminate the E2E link.
Test methods are provided in ISO/IEC 14763‑4.
End-to-end link configurations can include any type of connection.
PDF Catalog
PDF Pages | PDF Title |
---|---|
2 | National foreword |
4 | CONTENTS |
7 | FOREWORD |
8 | INTRODUCTION |
9 | 1 Scope 2 Normative references 3 Terms, definitions, abbreviated terms and symbols 3.1 Terms and definitions |
10 | 3.2 Abbreviated terms 3.3 Symbols |
11 | 4 Specifications Figures Figure 1 – Symbols for bulkhead connections |
12 | 5 Examples of end-to-end link configurations Figure 2 – One-segment, two-connections, E2E link Figure 3 – Two-segments, three-connections, E2E link Figure 4 – Three-segments, one-connection bulkheads, four-connections, E2E link Figure 5 – Three-segments, six-connections, E2E link |
13 | 6 Performance specifications when using end-to-end link limits 6.1 General Figure 6 – Three-segments, four-connections, E2E link Figure 7 – Three-segments, four-connections, E2E link Figure 8 – Four-segments, five-connections, E2E link Figure 9 – Five-segments, six-connections, E2E link |
14 | 6.2 Worst case limits Tables Table 1 – Worst case Class D E2E link performance at key frequencies |
15 | 6.3 Insertion loss limits Table 2 – Worst case Class E E2E link performance at key frequencies Table 3 – Class D E2E link insertion loss limits |
16 | 6.4 Return loss Table 4 – Class E E2E link insertion loss limits Table 5 – Class D E2E link return loss limits |
17 | Table 6 – Class E E2E link return loss limits |
18 | 6.5 NEXT limits Table 7 – Class D E2E link NEXT limits Table 8 – Class E E2E link NEXT limits |
19 | 6.6 PSNEXT limits Table 9 – Class D E2E link PSNEXT limits Table 10 – Class E E2E link PSNEXT limits |
20 | 6.7 ACR-F Limits Table 11 – Class D E2E Link ACR-F limits Table 12 –Class E E2E Link ACR-F limits |
21 | 6.8 PSACR-F 6.9 TCL specifications Table 13 – Class D E2E link PSACR-F limits Table 14 – Class E E2E link PSACR-F limits Table 15 – E2E link TCL |
22 | 6.10 ELTCTL specifications 6.11 Coupling attenuation specifications 6.12 DC loop resistance Table 16 – E2E link segment ELTCTL Table 17 – Minimum E2E link coupling attenuation Table 18 – E2E link segment DC loop resistance |
23 | 6.13 Propagation delay 6.14 Delay skew 6.15 DC resistance unbalance within a pair 7 E2E link performance 7.1 General Table 19 – E2E link delay Table 20 – E2E link delay skew Table 21 – E2E link DC resistance unbalance |
24 | 7.2 Reference performance testing 7.3 Installation performance testing 7.4 Installation performance testing of E2E links |
25 | 8 Testing of end-to-end links Table 22 – Test regime for reference performanceand installation performance – Balanced cabling of Classes D to E |
26 | Annex A (informative) CP cords A.1 Specifications for Class D and Class E CP cords A.2 Specifications for Class EA CP cords A.2.1 General A.2.2 Insertion loss A.2.3 Return loss Figure A.1 – One-segment, two-connection, CP cord Table A.1 – Class EA insertion loss specifications |
27 | A.2.4 NEXT A.2.5 PSNEXT A.2.6 ACR-F A.2.7 PSACR-F Table A.2 – Class EA return loss specifications Table A.3 – Class EA NEXT specifications Table A.4 – Class EA PSNEXT specifications Table A.5 – Class EA ACR-F specifications |
28 | A.2.8 TCL A.2.9 ELTCTL A.2.10 Propagation delay A.2.11 Delay skew A.2.12 DC resistance unbalance within a pair Table A.6 – Class EA PSACR-F specifications Table A.7 – Class EA propagation delay specifications Table A.8 – Class EA delay skew specifications Table A.9 – E2E link DC resistance unbalance |
29 | Bibliography |